Modulação phase disposition com algoritmo de sorting para conversores multiníveis simétricos em cascata

Abstract

This master thesis presents a modulation technique with sorting of the command signals of semiconductor devices, applied to symmetric cascaded multilevel converters. This technique, referenced here as Phase Disposition with Sorting (PDS), is based on the Phase Disposition (PD) modulation technique and has reference generation with geometric approach. The converter used in this study presents three cells per phase in configuration Back-to-Back. The algorithm aims to overcome the problem of irregular power distribution among the cascaded multilevel converter cells presented in the use of PD technique, but maintaining the characteristic of lower THD (Total Harmonic Distortion) and WTHD (Weighted Total Harmonic Distortion) indices on the line voltages in relation to Phase-Shifted (PS) modulation. Thus, with this redistribution of pulses over the switches, the algorithm is able to distribute the power among the cells and also allows its operation in the occurrence of faults in the converter. In this context, a bibliographic review is presented to introduce the topic of multilevel converters and the main modulation techniques employed, as well as what has already been done to overcome the problem of power distribution mentioned above. After the proper presentation of the reference generation by geometric approach and the proposed algorithm, simulation results for the converter without fault condition, as well as for fault conditions in different cells and modulation indices, will be presented and discussed. The methodology of control of the DC bus and communication protocol implemented will be presented and, at the end of this thesis, the validation of the proposed technique through the experimental results obtained will be presented.