Dynamic and static task mapping in a network-on-chip using machine learning techniques
Resumo
In the past few years, the number of cores encapsulated in a single die has been increasing dramatically. As the performance of bus infrastructure does not scale with the increasing number of cores, NoC (Network-on-Chip) has been largely used to connect them in multiprocessing systems. However, even using NoC, the overall system performance can be affected due to a poor task mapping. Considering such scenario, this work proposes a static and a dynamic task mapping flow to mitigate the communication overhead between tasks in a NoC. A workflow using machine learning algorithms is considered since: it can find an almost optimal configuration as a solution; and it can deal with the overhead generated by other algorithms, which makes they timely unfeasible to be used dynamically. At compile time, a genetic algorithm, which can find a static solution, combined with cluster techniques is used for generating a dataset which can be used for training of unsupervised algorithms. At execution time, a Support Vector Machine, due to its low overhead and robustness, use the training set generated at compile time for mapping tasks on the fly according to its communication behavior. Results show that with good classifications and training of supervised algorithms the proposed work flow can reduce the overhead and generate good mapping results, which makes a dynamic mapping possible.
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